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<title>#137 (1570397904): T4P4S: A Target-independent Compiler for High Performance Protocol-independent Packet Processors [2017 JSAC-SI-NETSOFT-ENABLERS] EDAS (1426400 - matej@elte.hu): </title>
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</div><span class="logo">2017 JSAC-SI-NETSOFT-ENABLERS</span><ul itemscope itemtype="http://schema.org/BreadcrumbList" class="breadcrumbs"><li itemprop="itemListElement" itemscope itemtype="http://schema.org/ListItem" class=" active"><span itemprop="name">#137 (1570397904): T4P4S: A Target-independent Compiler for High Performance Protocol-independent Packet Processors</span><meta itemprop="position" content="1" /></li></ul></div>
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<h1 >#137 (<a title="Show paper" target="showPaper" href="showPaper.php?m=1570397904">1570397904</a>): <em>T4P4S: A Target-independent Compiler for High Performance Protocol-independent Packet Processors</em></h1><div class="pageheader"></div>
<script src="server.php?client=all"></script><script src="js/prototype.js"></script><script src="js/HelpBalloon.js"></script><script src="js/flagPaper.js"></script><p > <a title="Generate BibTeX entry for paper" href="showBibTeX.php?m=1570397904"><img alt="Generate BibTeX entry for paper" id="i1" src="icon/bibtex.gif"/></a></p>
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<td><b>Conference</b> and <i>track</i></td>
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<td><b>IEEE Journal on Selected Areas in Communications - 2017 Special Issue on Network Softwarization & Enablers</b> - <i>NetSoft-General</i></td>
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<td>Authors</td>
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<td><a title="Show person" target="_self" href="showPerson.php?p=1019049&c=23884">Péter Vörös</a></td>
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<td>Eötvös Loránd University, Hungary</td>
<td><a href="mailto:Péter Vörös <vopraai@inf.elte.hu>">vopraai@inf.elte.hu</a> </td>
<td>Hungary</td>
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<td><a title="Show person" target="_self" href="showPerson.php?p=1426386&c=23884">Dániel Horpácsi</a></td>
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<td>Eötvös Loránd University, Hungary</td>
<td><a href="mailto:Dániel Horpácsi <daniel-h@elte.hu>">daniel-h@elte.hu</a> </td>
<td>Hungary</td>
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<td><a title="Show person" target="_self" href="showPerson.php?p=1426389&c=23884">Róbert Kitlei</a></td>
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<td>Eötvös Loránd University, Hungary</td>
<td><a href="mailto:Róbert Kitlei <kitlei@elte.hu>">kitlei@elte.hu</a> </td>
<td>Hungary</td>
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<td><a title="Show person" target="_self" href="showPerson.php?p=1426391&c=23884">Dániel Leskó</a></td>
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<td>Eötvös Loránd University, Hungary</td>
<td><a href="mailto:Dániel Leskó <ldani@elte.hu>">ldani@elte.hu</a> </td>
<td>Hungary</td>
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<td><a title="Show person" target="_self" href="showPerson.php?p=1426400&c=23884">Máté Tejfel</a></td>
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<td><a title="Edit author affiliation" target="_self" href="editAuthorAffiliation.php?m=1570397904&author=1426400">Eötvös Loránd University, Hungary</a></td>
<td><a href="mailto:Máté Tejfel <matej@elte.hu>">matej@elte.hu</a> </td>
<td>Hungary</td>
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<td><a title="Show person" target="_self" href="showPerson.php?p=516613&c=23884">Sándor Laki</a></td>
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<td>Eötvös Loránd University, Hungary</td>
<td><a href="mailto:Sándor Laki <laki@complex.elte.hu>">laki@complex.elte.hu</a> </td>
<td>Hungary</td>
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<td>Title</td>
<td align="center"><span class="notes">Only the chairs (<a href="mailto:2017jsac-si-netsoft-enablers-chairs@edas.info">2017jsac-si-netsoft-enablers-chairs@edas.info</a>) can edit</span></td>
<td><em>T4P4S: A Target-independent Compiler for High Performance Protocol-independent Packet Processors</em></td>
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<td>Abstract</td>
<td align="center"><span class="notes">Only the chairs (<a href="mailto:2017jsac-si-netsoft-enablers-chairs@edas.info">2017jsac-si-netsoft-enablers-chairs@edas.info</a>) can edit</span></td>
<td><div class="abstract">Although the programmability of control planes has been thoroughly examined in the past years, only a limited number of studies go beyond the consideration that the data plane is only a collection of simple packet forwarding devices. Even OpenFlow, a popular, very expressive data plane programming language, is still restricted to supporting a subset of existing protocol headers. To overcome such limitations, new data plane programming models have recently emerged. One of the them is P4, a high-level language for programming packet processors that enables great flexibility in the description of packet structures and processing pipelines. In this paper, we propose T4P4S, a multi-target compiler generating high performance switch programs from a P4 description. To support multiple targets, a networking hardware abstraction layer (NetHAL) is defined; the compiler generates a core switch code which is then linked with a target-specific NetHAL implementation. To avoid performance degradation, the boundaries of this separation should be chosen carefully, since the core program is only responsible for target-independent optimization, while the implementation of NetHAL should cover target-dependent enhancements. To analyze the performance, thorough measurements have been carried out, showing that the switch generated by T4P4S can easily scale beyond 100 Gbps.</div>
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<td>Keywords</td>
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<td><div class="keywords">Packet forwarding; SDN; Programmable data planes; P4</div>
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<td>Topics</td>
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<td>Software defined networking; Performance, interoperability, and scalability issues</td>
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<td style="background-color: #ff9900">Status</td>
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<td style="background-color: #ff9900"><span style="color: black; background-color: #ff9900">Rejected</span></td>
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<td align="center"><a title="PDF file" href="showManuscript.php?type=abstract&m=1570397904&ext=pdf"><img width="22" alt="pdf file" src="icon/pdf.gif"/></a></td>
<td align="right">26</td>
<td align="right">387,872</td>
<td><a title="Current time in different time zone" target="_self" href="time.php?t=1504303877">Sep 1, 2017 18:11:17 America/New_York</a></td>
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<h2 >Personal notes</h2><p ><a title="Add personal paper note" id="i3" href="addPersonalPaperNote.php?m=1570397904"><span class="fa fa-plus-square-o fa-2x"></span></a></p>
<p >You are an author for this paper.</p>
<h1 >Reviews</h1><h2 >3 Reviews</h2><h3 >Review 1 (Reviewer A)</h3><table class="showReview">
<tr class="odd">
<td><abbr title="Have the authors addressed the comments of the reviewer in a satisfactory manner?">Satisfied with the revision</abbr></td>
<td><abbr title="What is your overall recommendation for this paper?">Recommendation</abbr></td>
<td><abbr title="Is the topic adequately and concisely treated, or is the treatment too brief or too wordy?">Coverage</abbr></td>
<td><abbr title="Is related work on this topic adequately recognized, barely mentioned, or neglected?">References</abbr></td>
<td><abbr title="Is the material consistent and correct; are the conclusions well supported?">Accuracy</abbr></td>
<td><abbr title="Will this paper be important over time?">Impact</abbr></td>
<td><abbr title="Is the paper well-written; are ideas clearly expressed?">Presentation clarity</abbr></td>
<td><abbr title="How much of a contribution to the field is made by the work presented?">Contribution</abbr></td>
<td><abbr title="How original and novel are the concepts presented in the paper?">Novelty</abbr></td>
<td><abbr title="Relevance: How well-suited is the paper to this JSAC Special Issue on “JSAC-SI-NETSOFT-ENABLERS"">Relevance</abbr></td>
</tr>
<tr class="even">
<td><span class="reviewscore">No</span> (0)</td>
<td><span class="reviewscore">Review again after major changes (as noted below)</span> (5)</td>
<td><span class="reviewscore">Poor</span> (1)</td>
<td><span class="reviewscore">Poor</span> (1)</td>
<td><span class="reviewscore">Fair</span> (2)</td>
<td><span class="reviewscore">Probably not</span> (2)</td>
<td><span class="reviewscore">Needs work</span> (2)</td>
<td><span class="reviewscore">Worthwhile contribution</span> (3)</td>
<td><span class="reviewscore">Incremental</span> (3)</td>
<td><span class="reviewscore">Perfect match</span> (5)</td>
</tr>
</table>
<dl class="review">
<dt>Summary (Please summarize the paper briefly.)</dt>
<dd><div class="reviewtext">This paper presents T4P4S, a high-performance P4 compiler that supports multiple targets. The compiler generates a hardware-independent Core program code which uses a hardware abstraction layer (NetHAL) to be implemented for the given target.</div>
</dd>
<dt>Detailed Comments (Please provide detailed feedback to the author(s).)</dt>
<dd><div class="reviewtext">Implementing compilers of P4 with DPDK is a very interesting topic and relevant for network softwarization enablers.
However, the data plane programmability work has a long history, not started after P4 has come out. The authors need to study more about the background behind it.
The evaluation of various results must be elaborated more.
Checking with very few entries that can be fit into L2 caches does not produce meaningful results for us.
All the graph does not have any sort of error bars, statistical analysis, etc. The paper lacks fundamental evaluations in systems research. Unfortunately, this does not look appropriate for a journal paper, but more like a report for a workshop.</div>
</dd>
<dt>Negatives (What are the most important reasons NOT to accept this paper, in order of importance? (e.g., the paper has serious technical mistakes, isn't novel, doesn't demonstrate its point by proofs, simulations or experiments, makes very unreasonable assumptions, etc.) If the overall conclusions are still likely to hold despite these flaws, please say so. Say whether the negatives dominate the positives. (1-3 sentences))</dt>
<dd><div class="reviewtext">The data plane programmability work has a long history, not started after P4 has come out. The authors need to study more about the background behind it.
The evaluation of various results must be elaborated more.
Checking with very few entries that can be fit into L2 caches does not produce meaningful results for us.
All the graph does not have any sort of error bars, statistical analysis, etc. The paper lacks fundamental evaluations in systems research. Unfortunately, this does not look appropriate for a journal paper, but more like a report for a workshop.</div>
</dd>
<dt>Positives (What are the most important reasons to accept this paper, in order of importance? Say whether the positives dominate the negatives (1-3 sentences))</dt>
<dd><div class="reviewtext">Implementing compilers of P4 with DPDK is a very interesting topic and relevant for network softwarization enablers.</div>
</dd>
</dl>
<h3 >Review 2 (Reviewer B)</h3><table class="showReview">
<tr class="odd">
<td><abbr title="Have the authors addressed the comments of the reviewer in a satisfactory manner?">Satisfied with the revision</abbr></td>
<td><abbr title="What is your overall recommendation for this paper?">Recommendation</abbr></td>
<td><abbr title="Is the topic adequately and concisely treated, or is the treatment too brief or too wordy?">Coverage</abbr></td>
<td><abbr title="Is related work on this topic adequately recognized, barely mentioned, or neglected?">References</abbr></td>
<td><abbr title="Is the material consistent and correct; are the conclusions well supported?">Accuracy</abbr></td>
<td><abbr title="Will this paper be important over time?">Impact</abbr></td>
<td><abbr title="Is the paper well-written; are ideas clearly expressed?">Presentation clarity</abbr></td>
<td><abbr title="How much of a contribution to the field is made by the work presented?">Contribution</abbr></td>
<td><abbr title="How original and novel are the concepts presented in the paper?">Novelty</abbr></td>
<td><abbr title="Relevance: How well-suited is the paper to this JSAC Special Issue on “JSAC-SI-NETSOFT-ENABLERS"">Relevance</abbr></td>
</tr>
<tr class="even">
<td><span class="reviewscore">No</span> (0)</td>
<td><span class="reviewscore">Review again after major changes (as noted below)</span> (5)</td>
<td><span class="reviewscore">Good</span> (3)</td>
<td><span class="reviewscore">Good</span> (3)</td>
<td><span class="reviewscore">Fair</span> (2)</td>
<td><span class="reviewscore">Very likely</span> (4)</td>
<td><span class="reviewscore">Adequate</span> (3)</td>
<td><span class="reviewscore">Minor contribution</span> (2)</td>
<td><span class="reviewscore">Derivative</span> (2)</td>
<td><span class="reviewscore">Perfect match</span> (5)</td>
</tr>
</table>
<dl class="review">
<dt>Summary (Please summarize the paper briefly.)</dt>
<dd><div class="reviewtext">The paper presents a P4 compiler, T4P4S that can compile on multiple targets, at the moment, DPDK and ODP. More specifically, on top of the reference P4 compiler an improved middle end and two back ends are developed. The goal of the work appears to be sharing the middle end (Core) while combining back ends with different target architectures (NetHAL).
As P4 is a promising data plane programming language, it is important to be able to effectively translate P4 programs into low-level switch configurations.</div>
</dd>
<dt>Detailed Comments (Please provide detailed feedback to the author(s).)</dt>
<dd><div class="reviewtext">Since this work is proposing a P4 compiler, it would be great to present the proposed compiler against the standard compiler structure, that is, front end, middle end and back end. The pros and cons of the proposed design can then be laid out against each of the three components.
The implementation of the switch generated by the proposed compiler T4P4S is a mistery to me. This is no details on how your software switch is generated. As you are comparing with other software switches such as OVS, Pisces in the evaluation and Click in related work and this is no direct comparison between different P4 compilers, I got a bit lost: is the paper focused on presenting a P4 compiler or a software switch? It would be great to highlight the connections between the proposed P4 compiler and the software switch generated by the compiler.
In the evaluation, there is no detailed analysis on how the performance improvement is achieved. This could be linked back to the compiler design (e.g., IR and back end specs) and the design of the software switch.
My understanding of the compiler design is:
Front end: borrowed from the reference P4 compiler.
Middle end (Core): largely borrowed from the reference P4 compiler with some refinement. However, what refinement has been done is not clear. For example, what new IR optimizations have been done?
Back end (NetHAL): it appears fairly straightforward.
So, the compiler design is not as sophisticated as I originally thought. But, it is not clear what compiler design contributes to the performance improvement.
Fundamentally, the work is focused on "better" data plane abstraction in comparison with other relevant work. However, this is no concrete analysis demonstrating this.</div>
</dd>
<dt>Negatives (What are the most important reasons NOT to accept this paper, in order of importance? (e.g., the paper has serious technical mistakes, isn't novel, doesn't demonstrate its point by proofs, simulations or experiments, makes very unreasonable assumptions, etc.) If the overall conclusions are still likely to hold despite these flaws, please say so. Say whether the negatives dominate the positives. (1-3 sentences))</dt>
<dd><div class="reviewtext">The compiler desgin does not demonstrate the significance of the contribution. The front end is basically borrowed. The middle end seems to be largely borrowed. For example, it is not clear what optmization has been done with Intermediate Representation. The back end design is fairly straightforward. The research value of the work is limited.</div>
</dd>
<dt>Positives (What are the most important reasons to accept this paper, in order of importance? Say whether the positives dominate the negatives (1-3 sentences))</dt>
<dd><div class="reviewtext">It is an important topic, a perfect match to this special issue. The practical nature of the work is appealing. The design philosophy is in line with the current development of P4. The back end development for DPDK and ODP.</div>
</dd>
</dl>
<h3 >Review 3 (Reviewer E)</h3><table class="showReview">
<tr class="odd">
<td><abbr title="Have the authors addressed the comments of the reviewer in a satisfactory manner?">Satisfied with the revision</abbr></td>
<td><abbr title="What is your overall recommendation for this paper?">Recommendation</abbr></td>
<td><abbr title="Is the topic adequately and concisely treated, or is the treatment too brief or too wordy?">Coverage</abbr></td>
<td><abbr title="Is related work on this topic adequately recognized, barely mentioned, or neglected?">References</abbr></td>
<td><abbr title="Is the material consistent and correct; are the conclusions well supported?">Accuracy</abbr></td>
<td><abbr title="Will this paper be important over time?">Impact</abbr></td>
<td><abbr title="Is the paper well-written; are ideas clearly expressed?">Presentation clarity</abbr></td>
<td><abbr title="How much of a contribution to the field is made by the work presented?">Contribution</abbr></td>
<td><abbr title="How original and novel are the concepts presented in the paper?">Novelty</abbr></td>
<td><abbr title="Relevance: How well-suited is the paper to this JSAC Special Issue on “JSAC-SI-NETSOFT-ENABLERS"">Relevance</abbr></td>
</tr>
<tr class="even">
<td><span class="reviewscore">No</span> (0)</td>
<td><span class="reviewscore">Review again after major changes (as noted below)</span> (5)</td>
<td><span class="reviewscore">Good</span> (3)</td>
<td><span class="reviewscore">Good</span> (3)</td>
<td><span class="reviewscore">Good</span> (3)</td>
<td><span class="reviewscore">Can't quite tell</span> (3)</td>
<td><span class="reviewscore">Clear</span> (4)</td>
<td><span class="reviewscore">Worthwhile contribution</span> (3)</td>
<td><span class="reviewscore">Incremental</span> (3)</td>
<td><span class="reviewscore">Good match</span> (4)</td>
</tr>
</table>
<dl class="review">
<dt>Summary (Please summarize the paper briefly.)</dt>
<dd><div class="reviewtext">The paper presents a compiler for the P4 programming language that supports multi-targets. It is based on generating a core code that uses network-hardware abstraction libraries. The switch program is generated by linking the core with the target network-hardware implementations. Performance evaluations are performed for the proposed compiler.</div>
</dd>
<dt>Detailed Comments (Please provide detailed feedback to the author(s).)</dt>
<dd><div class="reviewtext">The reviewer notices that the authors tend to present the solution before saying what is the issue. In both abstract and introduction, the authors talk about OpenFlow and P4, then introduce their compiler without defending the need for a solution. The paper as it is presented misses motivations.
The quality of chart figures (from Fig. 6 to Fig. 14) is not good. In addition, as these figures are mostly presented without labeling the axes, it is sometimes difficult to understand the figures and the reader needs to return always to the text. The authors are invited to consider this observation.</div>
</dd>
<dt>Negatives (What are the most important reasons NOT to accept this paper, in order of importance? (e.g., the paper has serious technical mistakes, isn't novel, doesn't demonstrate its point by proofs, simulations or experiments, makes very unreasonable assumptions, etc.) If the overall conclusions are still likely to hold despite these flaws, please say so. Say whether the negatives dominate the positives. (1-3 sentences))</dt>
<dd><div class="reviewtext">The paper presents a good contribution that proposes mutli-target P4 compiler. However, given the related works, mainly on multi-target compilers, the novelty is not enough for JSAC.</div>
</dd>
<dt>Positives (What are the most important reasons to accept this paper, in order of importance? Say whether the positives dominate the negatives (1-3 sentences))</dt>
<dd><div class="reviewtext">Proposition of a compiler for the P4 programming language that supports multi-target.</div>
</dd>
</dl>
</div>
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