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<th align="RIGHT" nowrap="nowrap" valign="BASELINE">Subject:
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<td>any performance data on your P4ELTE/p4c compiler for
DPDK ?</td>
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<th align="RIGHT" nowrap="nowrap" valign="BASELINE">Date: </th>
<td>Wed, 27 Jul 2016 15:57:59 +0200</td>
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<th align="RIGHT" nowrap="nowrap" valign="BASELINE">From: </th>
<td>Luigi Rizzo <a class="moz-txt-link-rfc2396E" href="mailto:rizzo@iet.unipi.it"><rizzo@iet.unipi.it></a></td>
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<th align="RIGHT" nowrap="nowrap" valign="BASELINE">To: </th>
<td><a class="moz-txt-link-abbreviated" href="mailto:lakis@elte.hu">lakis@elte.hu</a></td>
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<th align="RIGHT" nowrap="nowrap" valign="BASELINE">CC: </th>
<td>Eggert, Lars <a class="moz-txt-link-rfc2396E" href="mailto:lars@netapp.com"><lars@netapp.com></a>, Yuri Iozzelli
<a class="moz-txt-link-rfc2396E" href="mailto:y.iozzelli@gmail.com"><y.iozzelli@gmail.com></a></td>
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<pre>Hi,
I have read the thread on the p4-dev list regarding your
P4 compiler targeting DPDK, and was wondering if you have
some performance data (in terms of packets per second or similar)
of your code, say for some simple P4 configuration.
With my student Yuri we have been working on accelerating the
reference p4 code on github (also adding support for netmap) and while
we have very good results in accelerating I/O and queues,
the main bottleneck is now in the ingress and egress stages.
Roughly speaking (we will post this later to the list):
- the reference P4 code has two operating modes:
SINGLE
all stages (input, parse, ingres, egress, deparse, output)
run in the same thread.
MULTI
processing is split in multiple threads (e.g. four)
connected by queues
The reference code has however very expensive queues so the
"MULTI" case is actually slower than the "SINGLE" one.
We measured some 4900 ns/pkt for SIMPLE_ROUTER, and 1400 ns/pkt
for L2 switch
- Yuri and I made a number of enhancements to the queues,
making them lock free, and that made the MULTI case more
efficient, so the bottleneck is now the slowest stage in
the pipeline.
- We also worked on the memory allocator (another significant
bottleneck) and added support for netmap.
Overall, we are now down to about 500 ns per packet for the L2
switch, and 1400 ns/pkt for the SIMPLE_ROUTER. We still have
some room for improvement in the latter case.
cheers
luigi
--
-----------------------------------------+-------------------------------
Prof. Luigi RIZZO, <a class="moz-txt-link-abbreviated" href="mailto:rizzo@iet.unipi.it">rizzo@iet.unipi.it</a> . Dip. di Ing. dell'Informazione
<a class="moz-txt-link-freetext" href="http://www.iet.unipi.it/~luigi/">http://www.iet.unipi.it/~luigi/</a> . Universita` di Pisa
TEL +39-050-2217533 . via Diotisalvi 2
Mobile +39-338-6809875 . 56122 PISA (Italy)
-----------------------------------------+-------------------------------
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