[P4] Fwd: any performance data on your P4ELTE/p4c compiler for DPDK ?

Dániel Horpácsi daniel-h at elte.hu
Wed Jul 27 16:38:25 CEST 2016


Cirka fél éve abban sem voltuk biztosak, hogy folytatódni fog a 
projektünk, most meg hozzánk járnak tanácsért a P4-gyel kísérletező 
emberek a világ különböző pontjairól :)

Apropó, a válaszra / arányszámra én is kíváncsi vagyok, mert nem vagyok 
képben, hogy nekünk mennyi idő egy csomagot átvinni.

Dani

On 2016-07-27 16:32, Sándor Laki wrote:
>
>
>
>
> -------- Forwarded Message --------
> Subject: 	any performance data on your P4ELTE/p4c compiler for DPDK ?
> Date: 	Wed, 27 Jul 2016 15:57:59 +0200
> From: 	Luigi Rizzo <rizzo at iet.unipi.it>
> To: 	lakis at elte.hu
> CC: 	Eggert, Lars <lars at netapp.com>, Yuri Iozzelli <y.iozzelli at gmail.com>
>
>
>
> Hi,
> I have read the thread on the p4-dev list regarding your
> P4 compiler targeting DPDK, and was wondering if you have
> some performance data (in terms of packets per second or similar)
> of your code, say for some simple P4 configuration.
>
> With my student Yuri we have been working on accelerating the
> reference p4 code on github (also adding support for netmap) and while
> we have very good results in accelerating I/O and queues,
> the main bottleneck is now in the ingress and egress stages.
>
> Roughly speaking (we will post this later to the list):
>
> - the reference P4 code has two operating modes:
>
>    SINGLE
>       all stages (input, parse, ingres, egress, deparse, output)
>       run in the same thread.
>    MULTI
>       processing is split in multiple threads (e.g. four)
>       connected by queues
>
>    The reference code has however very expensive queues so the
>    "MULTI" case is actually slower than the "SINGLE" one.
>    We measured some 4900 ns/pkt for SIMPLE_ROUTER, and 1400 ns/pkt
>    for L2 switch
>
> - Yuri and I made a number of enhancements to the queues,
>    making them lock free, and that made the MULTI case more
>    efficient, so the bottleneck is now the slowest stage in
>    the pipeline.
>
> - We also worked on the memory allocator (another significant
>    bottleneck) and added support for netmap.
>
> Overall, we are now down to about 500 ns per packet for the L2
> switch, and 1400 ns/pkt for the SIMPLE_ROUTER. We still have
> some room for improvement in the latter case.
>
> cheers
> luigi
>
> -- 
> -----------------------------------------+-------------------------------
>   Prof. Luigi RIZZO,rizzo at iet.unipi.it   . Dip. di Ing. dell'Informazione
>   http://www.iet.unipi.it/~luigi/         . Universita` di Pisa
>   TEL      +39-050-2217533               . via Diotisalvi 2
>   Mobile   +39-338-6809875               . 56122 PISA (Italy)
> -----------------------------------------+-------------------------------
>
>
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